From d51baf310e530659f73e714acf575555bdc46303 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Jan=20H=2E=20Sch=C3=B6nherr?= Date: Sun, 7 Jan 2018 12:28:20 -0800 Subject: [PATCH] x86: Don't use potentially incorrect CPUID values for topology information MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Intel says for CPUID leaf 0Bh: "Software must not use EBX[15:0] to enumerate processor topology of the system. This value in this field (EBX[15:0]) is only intended for display/diagnostic purposes. The actual number of logical processors available to BIOS/OS/Applications may be different from the value of EBX[15:0], depending on software and platform hardware configurations." And yet, we're using them to derive the number cores in a package and the number of siblings in a core. Derive the number of siblings and cores from EAX instead, which is intended for that. Signed-off-by: Jan H. Schönherr Reviewed-by: Andrew Cooper --- xen/arch/x86/cpu/common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c index e9588b3c0d..06e0eab132 100644 --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -479,8 +479,8 @@ void detect_extended_topology(struct cpuinfo_x86 *c) initial_apicid = edx; /* Populate HT related information from sub-leaf level 0 */ - core_level_siblings = c->x86_num_siblings = LEVEL_MAX_SIBLINGS(ebx); core_plus_mask_width = ht_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + core_level_siblings = c->x86_num_siblings = 1u << ht_mask_width; sub_index = 1; do { @@ -488,8 +488,8 @@ void detect_extended_topology(struct cpuinfo_x86 *c) /* Check for the Core type in the implemented sub leaves */ if ( LEAFB_SUBTYPE(ecx) == CORE_TYPE ) { - core_level_siblings = LEVEL_MAX_SIBLINGS(ebx); core_plus_mask_width = BITS_SHIFT_NEXT_LEVEL(eax); + core_level_siblings = 1u << core_plus_mask_width; break; } -- 2.30.2